ICM: Core 2 Quad – Same old same old
In terms of chip architecture, there is nothing new to report with the QX6700. It uses the exact same ICM technology that is found on the other members of the Core 2 family, except it has a twin sitting right next to it on the processor package. To save us the time and you the sedative, here is our explanation of the features and advantages of Intel Core Microarchitecture, as related, verbatim, in our initial Core 2 Duo review.

... Intel Core Microarchitecture is, as previously related, sort of a combination of the P6 marchitecture used in the Pentium III, and the Intel NetBurst marchitecture used in the Pentium 4. It combines existing features from P6 that lend to its more energy and time efficient design, as well as features from NetBurst that allow higher levels of performance. Before touching on each new innovation, here is a list of features that will be discussed:

• Intel Wide Dynamic Execution
• Intel Intelligent Power Capability
• Intel Advanced Smart Cache
• Intel Smart Memory Access
• Intel Advanced Digital Media Boost

Wide Dynamic Execution is Intel’s name for the system of decoders and execution cores used by ICM. While all processors have their Execution system, P6 had primitive dynamic execution and NetBurst had the Advanced Dynamic Execution Engine, Wide Dynamic Execution is a large step in right direction in terms of power efficiency and overall performance. Essentially what Intel has done is, as the name suggest, widened each execution core. This allows more instructions to be handled simultaneously, four rather than the three found in P6 and NetBurst. More specifically, Intel’s improvements focus around the implementation of more accurate branch prediction and deeper instruction buffers (where instructions sit before entering the execution core).

The most significant development here is something called “macrofusion”. Intel uses what they call macrofusion to combine common instruction pairs into something called a micro-op to be sent through the decoder to the execution core together at the same time. Previously, each instruction was sent through the decoder to the execution core by itself, even if a similar instruction was waiting right behind it. So by using macrofusion, Intel’s Wide Dynamic Execution engine increases the amount of instructions that can be sent to the execution core in any given period of time. This increases efficiency, which in turn increases performance and decreases power usage. Combine this with an upgraded algorithmic logic unit (ALU), and ICM has quite a powerful branch prediction/execution engine at its disposal.

In most current processors, all of the logic subsystems on the die are turned on at all times, whether they are being used or not. In ICM, Intel implements advanced power gating that allows each logic subsystem to be turned on only when it needs to be used. This means that the rest of the logic subsystems are turned off, or in some kind of hibernation mode, while they are not being used. The result is a significant decrease in overall power consumption, which of course further increases efficiency. This means that ICM uses much less power than traditional processors, making it the ideal platform for mobile computing. Intel’s name for these features is Intelligent Power Capability.

Another improvement that Intel made with ICM is what they call Advanced Smart Cache. With dual-core NetBurst processors as in the current Pentium D line, each execution core had its own independent bank of L2 cache. The problem, well not really a problem but more of an underutilization, with this was that each execution core only had access to half of the processor’s total available L2 cache. As we have learned empirically, increased L2 cache pretty much always means greater performance. Advanced Smart Cache effectively doubles the utilization of L2 cache with ICM, allowing the processors to access and write information to the cache in larger amounts, decreasing cache misses and increasing performance. This technique is similar to what we already see in AMD’s Athlon 64 X2 offerings.